
peer:     file format elf64-littleaarch64


Disassembly of section .init:

00000000004004c0 <.init>:
  4004c0:	a9bf7bfd 	stp	x29, x30, [sp, #-16]!
  4004c4:	910003fd 	mov	x29, sp
  4004c8:	94000034 	bl	400598 <printf@plt+0x58>
  4004cc:	a8c17bfd 	ldp	x29, x30, [sp], #16
  4004d0:	d65f03c0 	ret

Disassembly of section .plt:

00000000004004e0 <__libc_start_main@plt-0x20>:
  4004e0:	a9bf7bf0 	stp	x16, x30, [sp, #-16]!
  4004e4:	90000090 	adrp	x16, 410000 <printf@plt+0xfac0>
  4004e8:	f947fe11 	ldr	x17, [x16, #4088]
  4004ec:	913fe210 	add	x16, x16, #0xff8
  4004f0:	d61f0220 	br	x17
  4004f4:	d503201f 	nop
  4004f8:	d503201f 	nop
  4004fc:	d503201f 	nop

0000000000400500 <__libc_start_main@plt>:
  400500:	b0000090 	adrp	x16, 411000 <printf@plt+0x10ac0>
  400504:	f9400211 	ldr	x17, [x16]
  400508:	91000210 	add	x16, x16, #0x0
  40050c:	d61f0220 	br	x17

0000000000400510 <__gmon_start__@plt>:
  400510:	b0000090 	adrp	x16, 411000 <printf@plt+0x10ac0>
  400514:	f9400611 	ldr	x17, [x16, #8]
  400518:	91002210 	add	x16, x16, #0x8
  40051c:	d61f0220 	br	x17

0000000000400520 <abort@plt>:
  400520:	b0000090 	adrp	x16, 411000 <printf@plt+0x10ac0>
  400524:	f9400a11 	ldr	x17, [x16, #16]
  400528:	91004210 	add	x16, x16, #0x10
  40052c:	d61f0220 	br	x17

0000000000400530 <strstr@plt>:
  400530:	b0000090 	adrp	x16, 411000 <printf@plt+0x10ac0>
  400534:	f9400e11 	ldr	x17, [x16, #24]
  400538:	91006210 	add	x16, x16, #0x18
  40053c:	d61f0220 	br	x17

0000000000400540 <printf@plt>:
  400540:	b0000090 	adrp	x16, 411000 <printf@plt+0x10ac0>
  400544:	f9401211 	ldr	x17, [x16, #32]
  400548:	91008210 	add	x16, x16, #0x20
  40054c:	d61f0220 	br	x17

Disassembly of section .text:

0000000000400550 <.text>:
  400550:	d280001d 	mov	x29, #0x0                   	// #0
  400554:	d280001e 	mov	x30, #0x0                   	// #0
  400558:	aa0003e5 	mov	x5, x0
  40055c:	f94003e1 	ldr	x1, [sp]
  400560:	910023e2 	add	x2, sp, #0x8
  400564:	910003e6 	mov	x6, sp
  400568:	580000c0 	ldr	x0, 400580 <printf@plt+0x40>
  40056c:	580000e3 	ldr	x3, 400588 <printf@plt+0x48>
  400570:	58000104 	ldr	x4, 400590 <printf@plt+0x50>
  400574:	97ffffe3 	bl	400500 <__libc_start_main@plt>
  400578:	97ffffea 	bl	400520 <abort@plt>
  40057c:	00000000 	.inst	0x00000000 ; undefined
  400580:	00400960 	.inst	0x00400960 ; undefined
  400584:	00000000 	.inst	0x00000000 ; undefined
  400588:	00400978 	.inst	0x00400978 ; undefined
  40058c:	00000000 	.inst	0x00000000 ; undefined
  400590:	004009f8 	.inst	0x004009f8 ; undefined
  400594:	00000000 	.inst	0x00000000 ; undefined
  400598:	90000080 	adrp	x0, 410000 <printf@plt+0xfac0>
  40059c:	f947f000 	ldr	x0, [x0, #4064]
  4005a0:	b4000040 	cbz	x0, 4005a8 <printf@plt+0x68>
  4005a4:	17ffffdb 	b	400510 <__gmon_start__@plt>
  4005a8:	d65f03c0 	ret
  4005ac:	00000000 	.inst	0x00000000 ; undefined
  4005b0:	b0000080 	adrp	x0, 411000 <printf@plt+0x10ac0>
  4005b4:	9100e000 	add	x0, x0, #0x38
  4005b8:	b0000081 	adrp	x1, 411000 <printf@plt+0x10ac0>
  4005bc:	9100e021 	add	x1, x1, #0x38
  4005c0:	eb00003f 	cmp	x1, x0
  4005c4:	540000a0 	b.eq	4005d8 <printf@plt+0x98>  // b.none
  4005c8:	90000001 	adrp	x1, 400000 <__libc_start_main@plt-0x500>
  4005cc:	f9450c21 	ldr	x1, [x1, #2584]
  4005d0:	b4000041 	cbz	x1, 4005d8 <printf@plt+0x98>
  4005d4:	d61f0020 	br	x1
  4005d8:	d65f03c0 	ret
  4005dc:	d503201f 	nop
  4005e0:	b0000080 	adrp	x0, 411000 <printf@plt+0x10ac0>
  4005e4:	9100e000 	add	x0, x0, #0x38
  4005e8:	b0000081 	adrp	x1, 411000 <printf@plt+0x10ac0>
  4005ec:	9100e021 	add	x1, x1, #0x38
  4005f0:	cb000021 	sub	x1, x1, x0
  4005f4:	9343fc21 	asr	x1, x1, #3
  4005f8:	8b41fc21 	add	x1, x1, x1, lsr #63
  4005fc:	9341fc21 	asr	x1, x1, #1
  400600:	b40000a1 	cbz	x1, 400614 <printf@plt+0xd4>
  400604:	90000002 	adrp	x2, 400000 <__libc_start_main@plt-0x500>
  400608:	f9451042 	ldr	x2, [x2, #2592]
  40060c:	b4000042 	cbz	x2, 400614 <printf@plt+0xd4>
  400610:	d61f0040 	br	x2
  400614:	d65f03c0 	ret
  400618:	a9be7bfd 	stp	x29, x30, [sp, #-32]!
  40061c:	910003fd 	mov	x29, sp
  400620:	f9000bf3 	str	x19, [sp, #16]
  400624:	b0000093 	adrp	x19, 411000 <printf@plt+0x10ac0>
  400628:	3940e260 	ldrb	w0, [x19, #56]
  40062c:	35000080 	cbnz	w0, 40063c <printf@plt+0xfc>
  400630:	97ffffe0 	bl	4005b0 <printf@plt+0x70>
  400634:	52800020 	mov	w0, #0x1                   	// #1
  400638:	3900e260 	strb	w0, [x19, #56]
  40063c:	f9400bf3 	ldr	x19, [sp, #16]
  400640:	a8c27bfd 	ldp	x29, x30, [sp], #32
  400644:	d65f03c0 	ret
  400648:	17ffffe6 	b	4005e0 <printf@plt+0xa0>
  40064c:	a9bd7bfd 	stp	x29, x30, [sp, #-48]!
  400650:	910003fd 	mov	x29, sp
  400654:	90000000 	adrp	x0, 400000 <__libc_start_main@plt-0x500>
  400658:	9128a000 	add	x0, x0, #0xa28
  40065c:	f9000fa0 	str	x0, [x29, #24]
  400660:	90000000 	adrp	x0, 400000 <__libc_start_main@plt-0x500>
  400664:	91294000 	add	x0, x0, #0xa50
  400668:	aa0003e1 	mov	x1, x0
  40066c:	f9400fa0 	ldr	x0, [x29, #24]
  400670:	97ffffb0 	bl	400530 <strstr@plt>
  400674:	f90017a0 	str	x0, [x29, #40]
  400678:	90000000 	adrp	x0, 400000 <__libc_start_main@plt-0x500>
  40067c:	91296000 	add	x0, x0, #0xa58
  400680:	f94017a1 	ldr	x1, [x29, #40]
  400684:	97ffffaf 	bl	400540 <printf@plt>
  400688:	f94017a0 	ldr	x0, [x29, #40]
  40068c:	f100001f 	cmp	x0, #0x0
  400690:	54000ba0 	b.eq	400804 <printf@plt+0x2c4>  // b.none
  400694:	f9400fa0 	ldr	x0, [x29, #24]
  400698:	f90013a0 	str	x0, [x29, #32]
  40069c:	14000056 	b	4007f4 <printf@plt+0x2b4>
  4006a0:	90000000 	adrp	x0, 400000 <__libc_start_main@plt-0x500>
  4006a4:	91298000 	add	x0, x0, #0xa60
  4006a8:	f94013a1 	ldr	x1, [x29, #32]
  4006ac:	97ffffa5 	bl	400540 <printf@plt>
  4006b0:	90000000 	adrp	x0, 400000 <__libc_start_main@plt-0x500>
  4006b4:	9129c000 	add	x0, x0, #0xa70
  4006b8:	f9400fa1 	ldr	x1, [x29, #24]
  4006bc:	97ffffa1 	bl	400540 <printf@plt>
  4006c0:	f94013a0 	ldr	x0, [x29, #32]
  4006c4:	39400000 	ldrb	w0, [x0]
  4006c8:	7101801f 	cmp	w0, #0x60
  4006cc:	540000a9 	b.ls	4006e0 <printf@plt+0x1a0>  // b.plast
  4006d0:	f94013a0 	ldr	x0, [x29, #32]
  4006d4:	39400000 	ldrb	w0, [x0]
  4006d8:	7101e81f 	cmp	w0, #0x7a
  4006dc:	540003e9 	b.ls	400758 <printf@plt+0x218>  // b.plast
  4006e0:	f94013a0 	ldr	x0, [x29, #32]
  4006e4:	39400000 	ldrb	w0, [x0]
  4006e8:	7101001f 	cmp	w0, #0x40
  4006ec:	540000a9 	b.ls	400700 <printf@plt+0x1c0>  // b.plast
  4006f0:	f94013a0 	ldr	x0, [x29, #32]
  4006f4:	39400000 	ldrb	w0, [x0]
  4006f8:	7101681f 	cmp	w0, #0x5a
  4006fc:	540002e9 	b.ls	400758 <printf@plt+0x218>  // b.plast
  400700:	f94013a0 	ldr	x0, [x29, #32]
  400704:	39400000 	ldrb	w0, [x0]
  400708:	7100bc1f 	cmp	w0, #0x2f
  40070c:	540000a9 	b.ls	400720 <printf@plt+0x1e0>  // b.plast
  400710:	f94013a0 	ldr	x0, [x29, #32]
  400714:	39400000 	ldrb	w0, [x0]
  400718:	7100e41f 	cmp	w0, #0x39
  40071c:	540001e9 	b.ls	400758 <printf@plt+0x218>  // b.plast
  400720:	f94013a0 	ldr	x0, [x29, #32]
  400724:	39400000 	ldrb	w0, [x0]
  400728:	7100ac1f 	cmp	w0, #0x2b
  40072c:	54000160 	b.eq	400758 <printf@plt+0x218>  // b.none
  400730:	f94013a0 	ldr	x0, [x29, #32]
  400734:	39400000 	ldrb	w0, [x0]
  400738:	7100b41f 	cmp	w0, #0x2d
  40073c:	540000e0 	b.eq	400758 <printf@plt+0x218>  // b.none
  400740:	f94013a0 	ldr	x0, [x29, #32]
  400744:	39400000 	ldrb	w0, [x0]
  400748:	7100b81f 	cmp	w0, #0x2e
  40074c:	54000060 	b.eq	400758 <printf@plt+0x218>  // b.none
  400750:	f90017bf 	str	xzr, [x29, #40]
  400754:	1400002c 	b	400804 <printf@plt+0x2c4>
  400758:	f94013a0 	ldr	x0, [x29, #32]
  40075c:	39400000 	ldrb	w0, [x0]
  400760:	7101801f 	cmp	w0, #0x60
  400764:	540000a9 	b.ls	400778 <printf@plt+0x238>  // b.plast
  400768:	f94013a0 	ldr	x0, [x29, #32]
  40076c:	39400000 	ldrb	w0, [x0]
  400770:	7101e81f 	cmp	w0, #0x7a
  400774:	54000069 	b.ls	400780 <printf@plt+0x240>  // b.plast
  400778:	52800021 	mov	w1, #0x1                   	// #1
  40077c:	14000002 	b	400784 <printf@plt+0x244>
  400780:	52800001 	mov	w1, #0x0                   	// #0
  400784:	f94013a0 	ldr	x0, [x29, #32]
  400788:	39400000 	ldrb	w0, [x0]
  40078c:	7101001f 	cmp	w0, #0x40
  400790:	540000a9 	b.ls	4007a4 <printf@plt+0x264>  // b.plast
  400794:	f94013a0 	ldr	x0, [x29, #32]
  400798:	39400000 	ldrb	w0, [x0]
  40079c:	7101681f 	cmp	w0, #0x5a
  4007a0:	54000069 	b.ls	4007ac <printf@plt+0x26c>  // b.plast
  4007a4:	52800022 	mov	w2, #0x1                   	// #1
  4007a8:	14000002 	b	4007b0 <printf@plt+0x270>
  4007ac:	52800002 	mov	w2, #0x0                   	// #0
  4007b0:	f94013a0 	ldr	x0, [x29, #32]
  4007b4:	39400000 	ldrb	w0, [x0]
  4007b8:	7100bc1f 	cmp	w0, #0x2f
  4007bc:	540000a9 	b.ls	4007d0 <printf@plt+0x290>  // b.plast
  4007c0:	f94013a0 	ldr	x0, [x29, #32]
  4007c4:	39400000 	ldrb	w0, [x0]
  4007c8:	7100e41f 	cmp	w0, #0x39
  4007cc:	54000069 	b.ls	4007d8 <printf@plt+0x298>  // b.plast
  4007d0:	52800023 	mov	w3, #0x1                   	// #1
  4007d4:	14000002 	b	4007dc <printf@plt+0x29c>
  4007d8:	52800003 	mov	w3, #0x0                   	// #0
  4007dc:	90000000 	adrp	x0, 400000 <__libc_start_main@plt-0x500>
  4007e0:	912a0000 	add	x0, x0, #0xa80
  4007e4:	97ffff57 	bl	400540 <printf@plt>
  4007e8:	f94013a0 	ldr	x0, [x29, #32]
  4007ec:	91000400 	add	x0, x0, #0x1
  4007f0:	f90013a0 	str	x0, [x29, #32]
  4007f4:	f94013a1 	ldr	x1, [x29, #32]
  4007f8:	f94017a0 	ldr	x0, [x29, #40]
  4007fc:	eb00003f 	cmp	x1, x0
  400800:	54fff503 	b.cc	4006a0 <printf@plt+0x160>  // b.lo, b.ul, b.last
  400804:	90000000 	adrp	x0, 400000 <__libc_start_main@plt-0x500>
  400808:	91298000 	add	x0, x0, #0xa60
  40080c:	f94013a1 	ldr	x1, [x29, #32]
  400810:	97ffff4c 	bl	400540 <printf@plt>
  400814:	f94017a0 	ldr	x0, [x29, #40]
  400818:	f100001f 	cmp	x0, #0x0
  40081c:	54000680 	b.eq	4008ec <printf@plt+0x3ac>  // b.none
  400820:	f94017a0 	ldr	x0, [x29, #40]
  400824:	91000401 	add	x1, x0, #0x1
  400828:	f90017a1 	str	x1, [x29, #40]
  40082c:	3900001f 	strb	wzr, [x0]
  400830:	90000000 	adrp	x0, 400000 <__libc_start_main@plt-0x500>
  400834:	912ca001 	add	x1, x0, #0xb28
  400838:	90000000 	adrp	x0, 400000 <__libc_start_main@plt-0x500>
  40083c:	912a4000 	add	x0, x0, #0xa90
  400840:	f94017a3 	ldr	x3, [x29, #40]
  400844:	52800542 	mov	w2, #0x2a                  	// #42
  400848:	97ffff3e 	bl	400540 <printf@plt>
  40084c:	90000000 	adrp	x0, 400000 <__libc_start_main@plt-0x500>
  400850:	912ca001 	add	x1, x0, #0xb28
  400854:	90000000 	adrp	x0, 400000 <__libc_start_main@plt-0x500>
  400858:	912aa000 	add	x0, x0, #0xaa8
  40085c:	f9400fa3 	ldr	x3, [x29, #24]
  400860:	52800562 	mov	w2, #0x2b                  	// #43
  400864:	97ffff37 	bl	400540 <printf@plt>
  400868:	f94017a0 	ldr	x0, [x29, #40]
  40086c:	91000400 	add	x0, x0, #0x1
  400870:	39400000 	ldrb	w0, [x0]
  400874:	7100bc1f 	cmp	w0, #0x2f
  400878:	54000081 	b.ne	400888 <printf@plt+0x348>  // b.any
  40087c:	f94017a0 	ldr	x0, [x29, #40]
  400880:	91000800 	add	x0, x0, #0x2
  400884:	f90017a0 	str	x0, [x29, #40]
  400888:	f9400fa0 	ldr	x0, [x29, #24]
  40088c:	f9000ba0 	str	x0, [x29, #16]
  400890:	90000000 	adrp	x0, 400000 <__libc_start_main@plt-0x500>
  400894:	912ca001 	add	x1, x0, #0xb28
  400898:	90000000 	adrp	x0, 400000 <__libc_start_main@plt-0x500>
  40089c:	912b2000 	add	x0, x0, #0xac8
  4008a0:	f9400ba3 	ldr	x3, [x29, #16]
  4008a4:	528005e2 	mov	w2, #0x2f                  	// #47
  4008a8:	97ffff26 	bl	400540 <printf@plt>
  4008ac:	f94017a0 	ldr	x0, [x29, #40]
  4008b0:	f9000fa0 	str	x0, [x29, #24]
  4008b4:	90000000 	adrp	x0, 400000 <__libc_start_main@plt-0x500>
  4008b8:	912ca001 	add	x1, x0, #0xb28
  4008bc:	90000000 	adrp	x0, 400000 <__libc_start_main@plt-0x500>
  4008c0:	912a4000 	add	x0, x0, #0xa90
  4008c4:	f94017a3 	ldr	x3, [x29, #40]
  4008c8:	52800622 	mov	w2, #0x31                  	// #49
  4008cc:	97ffff1d 	bl	400540 <printf@plt>
  4008d0:	90000000 	adrp	x0, 400000 <__libc_start_main@plt-0x500>
  4008d4:	912ca001 	add	x1, x0, #0xb28
  4008d8:	90000000 	adrp	x0, 400000 <__libc_start_main@plt-0x500>
  4008dc:	912aa000 	add	x0, x0, #0xaa8
  4008e0:	f9400fa3 	ldr	x3, [x29, #24]
  4008e4:	52800642 	mov	w2, #0x32                  	// #50
  4008e8:	97ffff16 	bl	400540 <printf@plt>
  4008ec:	d503201f 	nop
  4008f0:	a8c37bfd 	ldp	x29, x30, [sp], #48
  4008f4:	d65f03c0 	ret
  4008f8:	a9be7bfd 	stp	x29, x30, [sp, #-32]!
  4008fc:	910003fd 	mov	x29, sp
  400900:	90000000 	adrp	x0, 400000 <__libc_start_main@plt-0x500>
  400904:	912bc000 	add	x0, x0, #0xaf0
  400908:	f9000fa0 	str	x0, [x29, #24]
  40090c:	90000000 	adrp	x0, 400000 <__libc_start_main@plt-0x500>
  400910:	91294000 	add	x0, x0, #0xa50
  400914:	aa0003e1 	mov	x1, x0
  400918:	f9400fa0 	ldr	x0, [x29, #24]
  40091c:	97ffff05 	bl	400530 <strstr@plt>
  400920:	f9000ba0 	str	x0, [x29, #16]
  400924:	90000000 	adrp	x0, 400000 <__libc_start_main@plt-0x500>
  400928:	91296000 	add	x0, x0, #0xa58
  40092c:	f9400ba1 	ldr	x1, [x29, #16]
  400930:	97ffff04 	bl	400540 <printf@plt>
  400934:	f9400ba0 	ldr	x0, [x29, #16]
  400938:	91000401 	add	x1, x0, #0x1
  40093c:	f9000ba1 	str	x1, [x29, #16]
  400940:	3900001f 	strb	wzr, [x0]
  400944:	90000000 	adrp	x0, 400000 <__libc_start_main@plt-0x500>
  400948:	912c6000 	add	x0, x0, #0xb18
  40094c:	f9400fa1 	ldr	x1, [x29, #24]
  400950:	97fffefc 	bl	400540 <printf@plt>
  400954:	d503201f 	nop
  400958:	a8c27bfd 	ldp	x29, x30, [sp], #32
  40095c:	d65f03c0 	ret
  400960:	a9bf7bfd 	stp	x29, x30, [sp, #-16]!
  400964:	910003fd 	mov	x29, sp
  400968:	97ffff39 	bl	40064c <printf@plt+0x10c>
  40096c:	52800000 	mov	w0, #0x0                   	// #0
  400970:	a8c17bfd 	ldp	x29, x30, [sp], #16
  400974:	d65f03c0 	ret
  400978:	a9bc7bfd 	stp	x29, x30, [sp, #-64]!
  40097c:	910003fd 	mov	x29, sp
  400980:	a901d7f4 	stp	x20, x21, [sp, #24]
  400984:	90000094 	adrp	x20, 410000 <printf@plt+0xfac0>
  400988:	90000095 	adrp	x21, 410000 <printf@plt+0xfac0>
  40098c:	91374294 	add	x20, x20, #0xdd0
  400990:	913722b5 	add	x21, x21, #0xdc8
  400994:	a902dff6 	stp	x22, x23, [sp, #40]
  400998:	cb150294 	sub	x20, x20, x21
  40099c:	f9001ff8 	str	x24, [sp, #56]
  4009a0:	2a0003f6 	mov	w22, w0
  4009a4:	aa0103f7 	mov	x23, x1
  4009a8:	9343fe94 	asr	x20, x20, #3
  4009ac:	aa0203f8 	mov	x24, x2
  4009b0:	97fffec4 	bl	4004c0 <__libc_start_main@plt-0x40>
  4009b4:	b4000194 	cbz	x20, 4009e4 <printf@plt+0x4a4>
  4009b8:	f9000bb3 	str	x19, [x29, #16]
  4009bc:	d2800013 	mov	x19, #0x0                   	// #0
  4009c0:	f8737aa3 	ldr	x3, [x21, x19, lsl #3]
  4009c4:	aa1803e2 	mov	x2, x24
  4009c8:	aa1703e1 	mov	x1, x23
  4009cc:	2a1603e0 	mov	w0, w22
  4009d0:	91000673 	add	x19, x19, #0x1
  4009d4:	d63f0060 	blr	x3
  4009d8:	eb13029f 	cmp	x20, x19
  4009dc:	54ffff21 	b.ne	4009c0 <printf@plt+0x480>  // b.any
  4009e0:	f9400bb3 	ldr	x19, [x29, #16]
  4009e4:	a941d7f4 	ldp	x20, x21, [sp, #24]
  4009e8:	a942dff6 	ldp	x22, x23, [sp, #40]
  4009ec:	f9401ff8 	ldr	x24, [sp, #56]
  4009f0:	a8c47bfd 	ldp	x29, x30, [sp], #64
  4009f4:	d65f03c0 	ret
  4009f8:	d65f03c0 	ret

Disassembly of section .fini:

00000000004009fc <.fini>:
  4009fc:	a9bf7bfd 	stp	x29, x30, [sp, #-16]!
  400a00:	910003fd 	mov	x29, sp
  400a04:	a8c17bfd 	ldp	x29, x30, [sp], #16
  400a08:	d65f03c0 	ret
